As shown in FIG. 1, a typical computer system (10) has, among other components, a microprocessor (12), one or more forms of memory (14), integrated circuits (16) having specific functionalities, and peripheral computer resources (not shown), e.g., monitor, keyboard, software programs, etc. These components communicate with one another via communication paths (19), e.g., wires, buses, etc., to accomplish the various tasks of the computer system (10).
In order to properly accomplish such tasks, the computer system (10) relies on the basis of time to coordinate its various operations. To that end, a crystal oscillator (18) generates a reference clock signal (referred to and known in the art as xe2x80x9csystem clockxe2x80x9d and shown in FIG. 1 as sys_clk) to various parts of the computer system (10). However, modem microprocessors and other integrated circuits are typically capable of operating at frequencies significantly higher than the signals most clock oscillators can provide, and thus, it becomes important to ensure that operations involving the microprocessor (12) and the other components of the computer system (10) use a proper and accurate reference of time.
One particular component that is heavily depended on by components of a computer system is a type of clock generator known as a phase locked loop, or xe2x80x9cPLLxe2x80x9d (20). The PLL (20) is an electronic circuit that controls an oscillator such that the oscillator maintains a constant phase relative to a reference signal. Referring to FIG. 1, the PLL (20) inputs the system clock as its reference signal and outputs a chip clock signal (shown in FIG. 1 as chip_clk) to the microprocessor (12), where the system clock and chip clock have a specific phase and frequency relationship controlled by the PLL (20). This relationship between the phases and frequencies of the system clock and chip clock ensures that the various components within the microprocessor (12) use a controlled and accounted for reference of time. In order to ensure that PLL (20) operates accurately, the presence of the system clock provided to the PLL (20) and chip clock generated by the PLL (20) may need to be checked.
It follows that if a particular clock signal necessary to the proper operation of an integrated circuit is not properly generated by a computer system or by a particular integrated circuit, errors in the integrated circuit""s operations may lead to errors and malfunction in the operation of the overall computer system. Thus, being able to detect whether a particular clock signal is present is an important and beneficial tool in assessing and improving system performance.
One approach used to detect a clock signal involves passing an AC-coupled clock signal through a clock detection component having a capacitor and an amplifier, where the clock detection circuitry is clocked by a reference clock. The reference clock serves as a basis of time for the operations of the clock detection component. In determining the presence of the clock signal, the AC-coupled clock signal is used to charge and discharge the capacitor, whereafter, the amplifier amplifies a signal coming from the capacitor to generate an output signal of the clock detection component. Using this output signal, one can determine whether the clock signal is present by looking for alternating high-to-low and low-to-high transitions.
Although this approach can detect the presence of a clock signal, the circuitry needed to construct the clock detection component discussed above is large and complex. Consequently, such a clock detection component uses a large amount of area on an integrated circuit and has a high data propagation time. Further, such a clock detection component requires the use of a reference clock. If the reference clock itself is not present, the clock detection component is susceptible to failure and improper operation.
According to one aspect of the present invention, a computer system having a component dependent on a clock signal comprises circuitry that generates a transition on a first signal dependent on whether the clock signal is active and circuitry that generates a transition on a clock detect indication signal dependent on the first signal.
According to another aspect, an integrated circuit comprises means for generating a transition on a clock detect signal dependent on whether a clock signal is active and means for indicating that the clock signal is active dependent on the transition on the clock detect signal.
According to another aspect, a method for detecting a clock signal comprises generating a transition on a first signal dependent on whether the clock signal is active and generating a transition on a clock detect indication signal dependent on the transition on the first signal.
Other aspects and advantages of the invention will be apparent from the following description and the appended claims.